Graphical Interface for a Processor Simulator

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The goal of this project is to extend the existing (simple) graphical user interface of the Patmos processor simulator.


Patmos is a processor developed within several research projects ( The aim of the research project is to develop a computer platform for real-time systems, i.e., systems controlling critical parts of airplanes, cars, et cetera. The processor is open-source, both as an actual hardware model (specified in Chisel) or through a software simulator.

Patmos Simulator

The simulator allows to execute programs written for Patmos on a regular PC. It simulates all mayor hardware components and thus allows to debug and test programs. The simulator tracks the entire internal state of the processor and thus could serve as an excellent tool for teaching. How does a processor work? Which parts are essential for good performance?

Two students from ENS Paris-Saclay and the ECE Paris started to implement a graphical user interface for the Patmos simulator that allows to follow the execution of a program. The interface is very basic and is rather incomplete. However, it already allows to visualize and understand certain aspects of the things that happen within the processor while it executes a program.

Figure 1, for instance, shows the theoretical optimal performance that the processor could achieve (green line). However, memory accesses and branches in actually “slow” the processor down when it executes a realistic program (here a Fast Fourier Transformation, aka. FFT). The red line thus diverges from the optimal. As can be seen this is particularly true at the beginning of the program where the red line is almost horizontal. Later on, the processor executes the program in an almost optimal fashion. The slow down is caused by (compulsory) cache misses.

Another example is shown in Figure 2, which shows how the processor executes individual instructions. The figure shows a kind of staircase function corresponding to the step-wise execution of instructions. The numbers (24, 300) indicate instructions that cause the processor to wait for data from memory – explaining the slowdown from before. One can also see that the staircase sometimes has dents. These are due to branches.


The goal of this project is to extend the graphical user interface to provide additional information. It would be interesting, for instance, to show a diagram of the processors hardware components (see Figure 3) and indicate which instructions are using which component at a given moment in time, along with the data that the instruction operates on. More precisely:

  1. You should add a new tab showing a simplified diagram of the Patmos processor
  2. Extract information concerning the currently executing instructions from the simulator
  3. Display the extracted information within the diagram:
    1. Which instruction is using which hardware component?
    2. What data is stored in the components?
    3. How does information flow through the processor?

In addition, some a cleanup of the existing code appears to be needed in order to reduce the GUI’s memory consumption and improve scalability. At the moment it is difficult to simulate large programs in the simulator due to a bloated data structure.


The Patmos simulator is developed using the following tools/programming languages: C++, cmake/make, Qt5 (for the graphical user interface). It’s not a particularly big project, but it is not trivial either.

The students working on the interface before indicated that they learned a lot while working on their project. In particular, they had to work within a real open-source project, intended for public use. This includes, in particular, the use of tools (cmake) and libraries (Qt5) that are essential in such an environment. They also appreciated that they gained a better understanding on how computers actually work and how this has an impact on programming.


Figure 1 : Comparison between the theoretical optimal performance of the processor with the actual performance observed


Figure 2 : A closer zoom showing how the internal state of the processor as it executes individual instructions


Figure 3 : Simplified diagram of the hardware design of the Patmos processor